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ATS
2004
IEEE
109views Hardware» more  ATS 2004»
15 years 10 months ago
Reconfiguration for Enhanced ALternate Test (REALTest) of Analog Circuits
An efficient design for test methodology to increase the test yield of analog circuits is presented. It is assumed that the analog circuits are tested using alternate tests that r...
Ganesh Srinivasan, Shalabh Goyal, Abhijit Chatterj...
ICSE
2003
IEEE-ACM
16 years 6 months ago
Demonstration of AGENDA Tool Set for Testing Relational Database Applications
Database systems play an important role in nearly every modern organization, yet relatively little research effort has focused on how to test them. AGENDA, A (test) GENerator for ...
David Chays, Yuetang Deng
ENTCS
2010
122views more  ENTCS 2010»
15 years 3 months ago
Efficient Earley Parsing with Regular Right-hand Sides
We present a new variant of the Earley parsing algorithm capable of efficiently supporting context-free grammars with regular right hand-sides. We present the core state-machine d...
Trevor Jim, Yitzhak Mandelbaum
141
Voted
SOFTWARE
2002
15 years 6 months ago
Sequential Diagnosis in the Independence Bayesian Framework
We present a new approach to test selection in sequential diagnosis (or classification) in the independence Bayesian framework that resembles the hypothetico-deductive approach to ...
David McSherry
ET
2002
115views more  ET 2002»
15 years 6 months ago
CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing
As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CASBUS that solves ...
Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki