54 search results - page 5 / 11 » Optimal simultaneous mapping and clustering for FPGA delay o... |
DAC
1996
ACM
15 years 1 months ago
1996
ACM
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
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FPGA
2009
ACM
15 years 4 months ago
2009
ACM
We describe an optimization method for combinational and sequential logic networks, with emphasis on scalability and the scope of optimization. The proposed resynthesis (a) is cap...
FPGA
2008
ACM
14 years 11 months ago
2008
ACM
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
ARC
2007
Springer
15 years 3 months ago
2007
Springer
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
FPGA
2007
ACM
15 years 3 months ago
2007
ACM
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...