309 search results - page 34 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
89
Voted
ICCAD
2002
IEEE
15 years 9 months ago
2002
IEEE
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
NETWORK
2007
15 years 2 days ago
2007
Programmable network interfaces can provide network servers with a flexible interface to high-bandwidth Ethernet links, but they face critical software and architectural challenge...
115
click to vote
HPCA
2004
IEEE
16 years 28 days ago
2004
IEEE
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new...
124
Voted
ISCAPDCS
2001
15 years 1 months ago
2001
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
143
Voted
HPCA
2005
IEEE
16 years 28 days ago
2005
IEEE
Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional ...