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HPCA
2003
IEEE
16 years 1 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...
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CLUSTER
2008
IEEE
15 years 8 months ago
A comparison of search heuristics for empirical code optimization
—This paper describes the application of various search techniques to the problem of automatic empirical code optimization. The search process is a critical aspect of auto-tuning...
Keith Seymour, Haihang You, Jack Dongarra
DATE
2008
IEEE
86views Hardware» more  DATE 2008»
15 years 8 months ago
Test Scheduling for Wafer-Level Test-During-Burn-In of Core-Based SoCs
Abstract—Wafer-level test during burn-in (WLTBI) has recently emerged as a promising technique to reduce test and burn-in costs in semiconductor manufacturing. However, the testi...
Sudarshan Bahukudumbi, Krishnendu Chakrabarty, Ric...
HPCS
2006
IEEE
15 years 7 months ago
Evaluation of Knapsack-Based Scheduling Using the NPACI JOBLOG
GridX1 is a computational grid deployment of off-theshelf components using shared resources at several Canadian research institutions. This work evaluates the applicability of kna...
Daniel C. Vanderster, Nikitas J. Dimopoulos, Rafae...
ICPADS
2005
IEEE
15 years 7 months ago
MeshTree: Reliable Low Delay Degree-bounded Multicast Overlays
We study decentralised low delay degree-constrained overlay multicast tree construction for single source real-time applications. This optimisation problem is NP-hard even if comp...
Su-Wei Tan, A. Gill Waters, John S. Crawford