151 search results - page 28 / 31 » Parallelizing while loops for multiprocessor systems |
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IEEEPACT
2006
IEEE
15 years 4 months ago
2006
IEEE
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
CC
2006
Springer
15 years 1 months ago
2006
Springer
The polyhedral model is known to be a powerful framework to reason about high level loop transformations. Recent developments in optimizing compilers broke some generally accepted ...
HPCA
2009
IEEE
15 years 4 months ago
2009
IEEE
While parallelism and multi-cores are receiving much attention as a major scalability path, customization is another, orthogonal and complementary, scalability path which can targ...
CLUSTER
2007
IEEE
15 years 4 months ago
2007
IEEE
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
110
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JMM2
2006
14 years 10 months ago
2006
Abstract-- This paper describes a framework for constructing a three-dimensional immersive environment that can be used for training physical activities. The system is designed to ...