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HPCA
2003
IEEE
15 years 10 months ago
Active I/O Switches in System Area Networks
We present an active switch architecture to improve the performance of systems connected via system area networks. Our programmable active switches not only flexibly route packets...
Ming Hao, Mark Heinrich
ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
15 years 6 months ago
Performances improvement of FPGA using novel multilevel hierarchical interconnection structure
This paper presents a new Multilevel hierarchical FPGA (MFPGA) architecture that unifies two unidirectional programmable networks: A predictible downward network based on the But...
Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Ha...
FPGA
2009
ACM
183views FPGA» more  FPGA 2009»
15 years 4 months ago
HW/SW methodologies for synchronization in FPGA multiprocessors
Modern Field Programmable Gate Arrays (FPGA) can be programmed with multiple soft-core processors. These solutions can be used for MultiProcessor Systems-on-Chip (MPSoCs) prototyp...
Antonino Tumeo, Christian Pilato, Gianluca Palermo...
MEDES
2009
ACM
15 years 4 months ago
A web-based interface to design information visualization
Information Visualization is a challenging field, enabling a better use of humans’ visual and cognitive system, to make sense of very large datasets. This paper aims at improvi...
Romain Vuillemot, Béatrice Rumpler
ESCIENCE
2007
IEEE
15 years 4 months ago
An Integrated Grid Development Environment in Eclipse
With the proliferation of Grid computing, a large number of computational resources are available for solving complex scientific and engineering problems. Nevertheless, it is non-...
Donny Kurniawan, David Abramson