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» Processor Architectures for Ontogenesis
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IPPS
2007
IEEE
16 years 14 days ago
Software and Algorithms for Graph Queries on Multithreaded Architectures
Search-based graph queries, such as finding short paths and isomorphic subgraphs, are dominated by memory latency. If input graphs can be partitioned appropriately, large cluster...
Jonathan W. Berry, Bruce Hendrickson, Simon Kahan,...
ISCA
2000
IEEE
105views Hardware» more  ISCA 2000»
15 years 10 months ago
Multiple-banked register file architectures
The register file access time is one of the critical delays in current superscalar processors. Its impact on processor performance is likely to increase in future processor genera...
José-Lorenzo Cruz, Antonio González,...
CF
2007
ACM
15 years 10 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...
IPPS
2003
IEEE
15 years 11 months ago
Reconfigurable Architecture Requirements for Co-Designed Virtual Machines
This paper addresses the physical hardware requirements necessary for a co-design hardware/software virtual machine to not only exist, but to also provide comparable performance w...
Kenneth B. Kent, Micaela Serra
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 10 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...