2700 search results - page 332 / 540 » Processor Architectures for Ontogenesis |
141
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ISCC
2005
IEEE
15 years 10 months ago
2005
IEEE
—A framework for designing a family of novel fast CRC generation algorithms is presented. Our algorithms can ideally read arbitrarily large amounts of data at a time, while optim...
123
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ISLPED
2004
ACM
15 years 10 months ago
2004
ACM
Leakage power is a major concern in current and future microprocessor designs. In this paper, we explore the potential of architectural techniques to reduce leakage through power-...
132
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WMPI
2004
ACM
15 years 10 months ago
2004
ACM
Clustered microarchitectures are an effective organization to deal with the problem of wire delays and complexity by partitioning some of the processor resources. The organization ...
133
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SAMOS
2004
Springer
15 years 10 months ago
2004
Springer
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
119
Voted
ARITH
2003
IEEE
15 years 10 months ago
2003
IEEE
This paper presents a 64-bit fixed-point vector multiply-accumulator (MAC) architecture capable of supporting multiple precisions. The vector MAC can perform one 64x64, two 32x32...