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VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
16 years 4 months ago
Architecture and Design of a High Performance SRAM for SOC Design
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
Shobha Singh, Shamsi Azmi, Nutan Aarawal, Penaka P...
PPAM
2007
Springer
15 years 10 months ago
New Data Structures for Matrices and Specialized Inner Kernels: Low Overhead for High Performance
Dense linear algebra codes are often expressed and coded in terms of BLAS calls. This approach, however, achieves suboptimal performance due to the overheads associated to such cal...
José R. Herrero
CORR
2008
Springer
117views Education» more  CORR 2008»
15 years 4 months ago
A High Performance Memory Database for Web Application Caches
This paper presents the architecture and characteristics of a memory database intended to be used as a cache engine for web applications. Primary goals of this database are speed a...
Ivan Voras, Danko Basch, Mario Zagar
IPPS
2007
IEEE
15 years 10 months ago
Design Alternatives for a High-Performance Self-Securing Ethernet Network Interface
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...
Derek L. Schuff, Vijay S. Pai
PPOPP
2006
ACM
15 years 10 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...