199 search results - page 5 / 40 » Register pointer architecture for efficient embedded process... |
101
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LCTRTS
2007
Springer
15 years 6 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
100
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RTCSA
2006
IEEE
15 years 5 months ago
2006
IEEE
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
109
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DATE
2007
IEEE
15 years 6 months ago
2007
IEEE
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
127
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CASES
2007
ACM
15 years 1 months ago
2007
ACM
Aggressive compiler optimizations such as software pipelining and loop invariant code motion can significantly improve application performance, but these transformations often re...
108
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ICS
2007
Tsinghua U.
15 years 6 months ago
2007
Tsinghua U.
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...