39 search results - page 4 / 8 » Software Pipelining for Coarse-Grained Reconfigurable Instru... |
GLVLSI
1998
IEEE
15 years 1 months ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
ARC
2006
Springer
15 years 1 months ago
2006
Springer
We introduce a new paradigm in the computer architecture referred to as Polymorphic Instruction Set Computers (PISC). This new paradigm, in difference to RISC/CISC, introduces hard...
FPL
2010
Springer
14 years 7 months ago
2010
Springer
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...
105
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CSSE
2008
IEEE
14 years 11 months ago
2008
IEEE
According to dramatically growing interesting in power-efficient embedded processor, designers must establish the proper power strategy when they design new embedded processor core...
113
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ISCA
2000
IEEE
15 years 1 months ago
2000
IEEE
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāspecific operations. We report our experience with Chimae...