199 search results - page 28 / 40 » Switching Activity Minimization in Combinational Logic Desig... |
DAC
1996
ACM
15 years 3 months ago
1996
ACM
1 In this paper, we propose a hybrid approach for estimating the switching activities of the internal nodes in logic circuits. The new approach combines the advantages of the simul...
CHI
2006
ACM
16 years 1 days ago
2006
ACM
This paper gives an overview of RadioActive, a largescale asynchronous audio messaging platform for mobile devices. It supports persistent chat spaces that allow users to engage i...
106
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GLVLSI
1998
IEEE
15 years 3 months ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
GLVLSI
2003
IEEE
15 years 5 months ago
2003
IEEE
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
ICCAD
2005
IEEE
15 years 8 months ago
2005
IEEE
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...