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» Testing embedded-core based system chips
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DSD
2004
IEEE
129views Hardware» more  DSD 2004»
13 years 10 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
ISLPED
1995
ACM
112views Hardware» more  ISLPED 1995»
13 years 9 months ago
Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors
Analog techniques can lead to ultra-efficient computational systems when applied to the right applications. The problem of associative memory is well suited to array-based analog ...
Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. ...
INFOCOM
2007
IEEE
14 years 17 days ago
TriBiCa: Trie Bitmap Content Analyzer for High-Speed Network Intrusion Detection
Abstract—Deep packet inspection (DPI) is often used in network intrusion detection and prevention systems (NIDPS), where incoming packet payloads are compared against known attac...
N. Sertac Artan, H. Jonathan Chao
FMCAD
2006
Springer
13 years 10 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar
BMCBI
2011
12 years 10 months ago
Evaluating methods for ranking differentially expressed genes applied to MicroArray Quality Control data
Background: Statistical methods for ranking differentially expressed genes (DEGs) from gene expression data should be evaluated with regard to high sensitivity, specificity, and r...
Koji Kadota, Kentaro Shimizu