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» The Design and Analysis of Parallel Algorithms
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112
Voted
VLSID
1996
IEEE
119views VLSI» more  VLSID 1996»
15 years 5 months ago
Parallel simulated annealing strategies for VLSI cell placement
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process, and as a result several research efforts have been un...
John A. Chandy, Prithviraj Banerjee
IPPS
2006
IEEE
15 years 6 months ago
Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framew
In reconfigurable systems, reconfiguration latency is a very important factor impact the system performance. In this paper, a framework is proposed that integrates the temporal pa...
Farhad Mehdipour, Morteza Saheb Zamani, H. R. Ahma...
106
Voted
ICFP
2008
ACM
16 years 24 days ago
A scheduling framework for general-purpose parallel languages
The trend in microprocessor design toward multicore and manycore processors means that future performance gains in software will largely come from harnessing parallelism. To reali...
Matthew Fluet, Mike Rainey, John H. Reppy
92
Voted
IPPS
2007
IEEE
15 years 7 months ago
A Parallel Hybrid Method of GMRES on GRID System
Grid computing focuses on making use of a very large amount of resources from a large-scale computing environment. It intends to deliver high-performance computing over distribute...
Ye Zhang, Guy Bergére, Serge G. Petiton
IPPS
1998
IEEE
15 years 5 months ago
Predicting the Running Times of Parallel Programs by Simulation
Predicting the running time of a parallel program is useful for determining the optimal values for the parameters of the implementation and the optimal mapping of data on processo...
Radu Rugina, Klaus E. Schauser