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DSD
2009
IEEE
15 years 6 months ago
2009
IEEE
—Long test application time and high temperature have become two major issues of system-on-chip (SoC) test. In order to minimize test application times and avoid overheating duri...
ET
2002
14 years 11 months ago
2002
Test access mechanisms (TAMs) and test wrappers are integral parts of a system-on-chip (SOC) test architecture. Prior research has concentrated on only one aspect of the TAM/wrappe...
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ATS
2005
IEEE
15 years 5 months ago
2005
IEEE
11 Due to the increasing test data volume needed to test corebased System-on-Chip, several test scheduling techniques minimizing the test application time have been proposed. In co...
ITC
1997
IEEE
15 years 4 months ago
1997
IEEE
The detection of cell stability and data retention faults in SRAMs has been a time consuming process. In this paper we discuss a new design for test technique called Weak Write Tes...
DFT
2006
IEEE
15 years 5 months ago
2006
IEEE
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...