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IPPS
2007
IEEE
15 years 4 months ago
A Study of Design Efficiency with a High-Level Language for FPGAs
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
Zain-ul-Abdin, Bertil Svensson
EMSOFT
2006
Springer
15 years 1 months ago
Modeling a system controller for timing analysis
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
Stephan Thesing
JWSR
2006
114views more  JWSR 2006»
14 years 10 months ago
Metadata, Ontologies, and Information Models for Grid PSE Toolkits Based on Web Services
: A PSE toolkit is a group of technologies within a software architecture through which multiple PSEs can be built for different application domains. The effective use of a PSE too...
Carmela Comito, Carlo Mastroianni, Domenico Talia
BMCBI
2005
246views more  BMCBI 2005»
14 years 10 months ago
ParPEST: a pipeline for EST data analysis based on parallel computing
Background: Expressed Sequence Tags (ESTs) are short and error-prone DNA sequences generated from the 5' and 3' ends of randomly selected cDNA clones. They provide an im...
Nunzio D'Agostino, Mario Aversano, Maria Luisa Chi...
DAC
2000
ACM
15 years 11 months ago
To split or to conjoin: the question in image computation
Image computation is the key step in fixpoint computations that are extensively used in model checking. Two techniques have been used for this step: one based on conjunction of the...
In-Ho Moon, James H. Kukula, Kavita Ravi, Fabio So...