862 search results - page 105 / 173 » The amorphous FPGA architecture |
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose lin...
FPL
2003
Springer
15 years 3 months ago
2003
Springer
Abstract. A smart transducer network hosts various nodes with different functionality. Our approach offers the possibility to design different smart transducer nodes as a system...
TVLSI
2008
14 years 9 months ago
2008
Abstract--In this paper, we describe the design for a co-processor for whole-genome phylogenetic reconstruction. Our current design performs a parallelized breakpoint median comput...
CF
2007
ACM
15 years 1 months ago
2007
ACM
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
FPGA
1995
ACM
15 years 1 months ago
1995
ACM
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...