628 search results - page 60 / 126 » Tying Memory Management to Parallel Programming Models |
117
click to vote
ICPR
2000
IEEE
15 years 5 months ago
2000
IEEE
This paper describes an infrastructure that enables transparent development of image processing software for parallel computers. The infrastructure’s main component is an image ...
115
Voted
EUROPAR
2001
Springer
15 years 5 months ago
2001
Springer
Abstract. This paper describes a software architecture that allows image processing researchers to develop parallel applications in a transparent manner. The architecture’s main ...
98
Voted
LCTRTS
2009
Springer
15 years 7 months ago
2009
Springer
Embedded systems, like general-purpose systems, can benefit from parallel execution on a symmetric multicore platform. Unfortunately, concurrency issues present in general-purpos...
IPPS
2009
IEEE
15 years 7 months ago
2009
IEEE
As the number of cores per machine increases, memory architectures are being redesigned to avoid bus contention and sustain higher throughput needs. The emergence of Non-Uniform M...
HPDC
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...