872 search results - page 34 / 175 » UML-based design test generation |
109
Voted
ASPDAC
2007
ACM
15 years 5 months ago
2007
ACM
- Two methods to apply tests to detect delay faults in standard scan designs are used. One is called launch off capture and the other is called launch off shift. Launch off shift t...
132
Voted
ATS
2000
IEEE
15 years 6 months ago
2000
IEEE
Because domino logic design offers smaller area and faster delay than conventional CMOS design, it is very popular in the high-performance processor design. However, domino logic ...
138
Voted
ICST
2009
IEEE
15 years 8 months ago
2009
IEEE
It is challenging to test applications and functions for which the correct output for arbitrary input cannot be known in advance, e.g. some computational science or machine learni...
127
click to vote
ET
2002
15 years 1 months ago
2002
As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CASBUS that solves ...
121
click to vote
CSREASAM
2006
15 years 3 months ago
2006
Firewalls are the cornerstones of network security. To make firewalls working effectively, firewall manager must design firewall rules and the rule order correctly. In this paper, ...