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EH
1999
IEEE
351views Hardware» more  EH 1999»
15 years 3 months ago
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
Marek A. Perkowski, Alan Mishchenko, Anatoli N. Ch...
IPPS
1998
IEEE
15 years 3 months ago
Benchmarking the Task Graph Scheduling Algorithms
The problem of scheduling a weighted directed acyclic graph (DAG) to a set of homogeneous processors to minimize the completion time has been extensively studied. The NPcompletene...
Yu-Kwong Kwok, Ishfaq Ahmad
FMCAD
2006
Springer
15 years 2 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar
FORMATS
2006
Springer
15 years 2 months ago
A Dose of Timed Logic, in Guarded Measure
We consider interval measurement logic IML, a sublogic of Zhou and Hansen's interval logic, with measurement functions which provide real-valued measurement of some aspect of ...
Kamal Lodaya, Paritosh K. Pandya
ICALP
2010
Springer
15 years 23 days ago
From Secrecy to Soundness: Efficient Verification via Secure Computation
d Abstract) Benny Applebaum1 , Yuval Ishai2 , and Eyal Kushilevitz3 1 Computer Science Department, Weizmann Institute of Science 2 Computer Science Department, Technion and UCLA 3 ...
Benny Applebaum, Yuval Ishai, Eyal Kushilevitz