This paper presents an overview of a prototype hardware compiler which compiles a design expressed in the Ruby language into FPGAs. The features of two important modules, the re ne...
This work presents a dedicated hardware design for the Forward Quantization Module (Q module) of the H.264/AVC Video Coding Standard, using optimized multipliers. The goal of this...
Felipe Sampaio, Daniel Palomino, Robson Dornelles,...
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
Effective high-level ATPG tools are increasingly needed, as an essential element in the quest for reducing as much as possible the designer work on gate-level descriptions. We pro...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...