Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
PDF Tools
Image Tools
Text Tools
OCR Tools
Symbol and Emoji Tools
On-screen Keyboard
Latex Math Equation to Image
Smart IPA Phonetic Keyboard
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
2449
search results - page 66 / 490
»
VLSI
Sort
relevance
views
votes
recent
update
View
thumb
title
81
click to vote
GLVLSI
2003
IEEE
140
views
VLSI
»
more
GLVLSI 2003
»
A dual band CMOS VCO with a balanced duty cycle buffer
15 years 8 months ago
Download
www.cs.york.ac.uk
This paper proposes a dual band VCO with a standard 0.35 ㎛
Yun Cheol Han, Kwang il Kim, Jun Kim, Kwang Sub Yo...
claim paper
Read More »
116
Voted
DFT
1999
IEEE
80
views
VLSI
»
more
DFT 1999
»
Determination of Yield Bounds Prior to Routing
15 years 7 months ago
Download
euler.ecs.umass.edu
Integrated Circuit manufacturing complexities have resulted in decreasing product yields and reliabilities. This process has been accelerated with the advent of very deep sub-micr...
Arunshankar Venkataraman, Israel Koren
claim paper
Read More »
102
Voted
FCCM
1999
IEEE
127
views
VLSI
»
more
FCCM 1999
»
SONIC - A Plug-In Architecture for Video Processing
15 years 7 months ago
Download
www.doc.ic.ac.uk
This paper presents the SONIC reconfigurable computing architecture and the first implementation,
Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk, Jo...
claim paper
Read More »
114
Voted
GLVLSI
1998
IEEE
119
views
VLSI
»
more
GLVLSI 1998
»
Dynamic and Short-Circuit Power of CMOS Gates Driving Lossless Transmission Lines
15 years 7 months ago
Download
www.eecs.northwestern.edu
The dynamic and short-circuit power consumption of a complementary metal
Yehea I. Ismail, Eby G. Friedman, José Luis...
claim paper
Read More »
100
Voted
VLSID
1995
IEEE
97
views
VLSI
»
more
VLSID 1995
»
Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability
15 years 7 months ago
Download
www1.cs.columbia.edu
In this paper, we present methods for synthesizing multi-level asynchronous circuits to be both hazard-free
Steven M. Nowick, Niraj K. Jha, Fu-Chiung Cheng
claim paper
Read More »
« Prev
« First
page 66 / 490
Last »
Next »