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GLVLSI
2003
IEEE
140views VLSI» more  GLVLSI 2003»
15 years 3 months ago
A dual band CMOS VCO with a balanced duty cycle buffer
This paper proposes a dual band VCO with a standard 0.35 ㎛
Yun Cheol Han, Kwang il Kim, Jun Kim, Kwang Sub Yo...
DFT
1999
IEEE
80views VLSI» more  DFT 1999»
15 years 2 months ago
Determination of Yield Bounds Prior to Routing
Integrated Circuit manufacturing complexities have resulted in decreasing product yields and reliabilities. This process has been accelerated with the advent of very deep sub-micr...
Arunshankar Venkataraman, Israel Koren
FCCM
1999
IEEE
127views VLSI» more  FCCM 1999»
15 years 2 months ago
SONIC - A Plug-In Architecture for Video Processing
This paper presents the SONIC reconfigurable computing architecture and the first implementation,
Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk, Jo...
GLVLSI
1998
IEEE
119views VLSI» more  GLVLSI 1998»
15 years 2 months ago
Dynamic and Short-Circuit Power of CMOS Gates Driving Lossless Transmission Lines
The dynamic and short-circuit power consumption of a complementary metal
Yehea I. Ismail, Eby G. Friedman, José Luis...
VLSID
1995
IEEE
97views VLSI» more  VLSID 1995»
15 years 1 months ago
Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability
In this paper, we present methods for synthesizing multi-level asynchronous circuits to be both hazard-free
Steven M. Nowick, Niraj K. Jha, Fu-Chiung Cheng