1000 search results - page 71 / 200 » Yield-Aware Cache Architectures |
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
CCGRID
2003
IEEE
15 years 3 months ago
2003
IEEE
This paper presents Cluster-Aware Remote Disks (CARDs), a Single System I/O architecture for cluster computing. CARDs virtualize accesses to remote cluster disks over a System Are...
IPPS
2000
IEEE
15 years 2 months ago
2000
IEEE
Time skewing is a compile-time optimization that can provide arbitrarily high cache hit rates for a class of iterative calculations, given a sufficient number of time steps and s...
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RTAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
ICPADS
1998
IEEE
15 years 2 months ago
1998
IEEE
This paper describes a scalable Web server array architecture which uses a caching policy called Probability Based Replacement (PBR) algorithm [5, 6]. The server array consists of...