Sciweavers

681 search results - page 49 / 137
» et 2006
Sort
View
ET
2007
101views more  ET 2007»
14 years 9 months ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
ET
2002
115views more  ET 2002»
14 years 9 months ago
CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing
As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CASBUS that solves ...
Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki
ET
2002
122views more  ET 2002»
14 years 9 months ago
Using At-Speed BIST to Test LVDS Serializer/Deserializer Function
LVDS is the acronym for Low-Voltage-DifferentialSignaling and is described in both the ANSI/TIA/EIA644 and IEEE 1596.3 standards. High performance yet Low Power and EMI have made ...
Magnus Eckersand, Fredrik Franzon, Ken Filliter
ACNS
2006
Springer
81views Cryptology» more  ACNS 2006»
15 years 3 months ago
A Handy Multi-coupon System
A coupon is an electronic data that represents the right to access a service provided by a service provider (e.g. gift certificates or movie tickets). Recently, a privacyprotectin...
Sébastien Canard, Aline Gouget, Emeline Huf...
CP
2006
Springer
15 years 1 months ago
When Interval Analysis Helps Inter-block Backtracking
Inter-block backtracking (IBB) computes all the solutions of sparse systems of non-linear equations over the reals. This algorithm, introduced in 1998 by Bliek et al., handles a sy...
Bertrand Neveu, Gilles Chabert, Gilles Trombettoni