15 search results - page 1 / 3 » A Clocked, Static Circuit Technique for Building Efficient H... |
GLVLSI
1997
IEEE
13 years 9 months ago
1997
IEEE
DSN
2005
IEEE
13 years 11 months ago
2005
IEEE
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
FCCM
2004
IEEE
13 years 9 months ago
2004
IEEE
In this paper we advocate the use of pre-decoding for CAM-based pattern matching. We implement an FPGA based sub-system for NIDS (Snort) pattern matching using a combination of te...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...