52 search results - page 3 / 11 » A Design-for-Testability Technique for Detecting Delay Fault... |
DAC
2009
ACM
14 years 6 months ago
2009
ACM
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
DFT
2004
IEEE
13 years 9 months ago
2004
IEEE
This paper presents a novel delay fault testing technique, which can be used as an alternative to the enhanced scan based delay fault testing, with significantly less design overh...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
— With increasing process fluctuations in nano-scale technology, testing for delay faults is becoming essential in manufacturing test to complement stuck-at-fault testing. Desig...
GLVLSI
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
ATS
2000
IEEE
13 years 10 months ago
2000
IEEE
Because domino logic design offers smaller area and faster delay than conventional CMOS design, it is very popular in the high-performance processor design. However, domino logic ...