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FPL
2004
Springer
128views Hardware» more  FPL 2004»
13 years 10 months ago
Design and Implementation of a CFAR Processor for Target Detection
Real-time performance of adaptive digital signal processing algorithms is required in many applications but it often means a high computational load for many conventional processor...
Cesar Torres-Huitzil, René Cumplido-Parra, ...
DAC
1997
ACM
13 years 9 months ago
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
Marleen Adé, Rudy Lauwereins, J. A. Peperst...
FPGA
2008
ACM
308views FPGA» more  FPGA 2008»
13 years 7 months ago
Fpga-based data acquisition system for a positron emission tomography (PET) scanner
: Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates of above 100MHz. This combined with FPGAs l...
Michael Haselman, Robert Miyaoka, Thomas K. Lewell...
ISCAS
2008
IEEE
112views Hardware» more  ISCAS 2008»
13 years 11 months ago
Glitch-aware output switching activity from word-level statistics
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...
Jonathan A. Clarke, George A. Constantinides, Pete...
FPL
2003
Springer
114views Hardware» more  FPL 2003»
13 years 10 months ago
Power Analysis of FPGAs: How Practical is the Attack?
Recent developments in information technologies made the secure transmission of digital data a critical design point. Large data flows have to be exchanged securely and involve en...
François-Xavier Standaert, Loïc van Ol...