28 search results - page 1 / 6 » An analytic placer for mixed-size placement and timing-drive... |
DAC
2007
ACM
14 years 5 months ago
2007
ACM
In this paper, we present a new multi-packing tree (MP-tree) representation for macro placement to handle mixed-size designs. Based on binary trees, the MP-tree is very efficient,...
TCAD
2008
13 years 4 months ago
2008
In this paper, we present a new multipacking-tree (MP-tree) representation for macro placements to handle modern mixed-size designs with large macros and high chip utilization rate...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible...
ASPDAC
2006
ACM
13 years 8 months ago
2006
ACM
Abstract-- In this paper, we present FastPlace 2.0
ISPD
2010
ACM
13 years 11 months ago
2010
ACM
Existing 3D placement techniques are mainly used for standardcell circuits, while mixed-size placement is needed to support highlevel functional units and intellectual property (I...