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» An experimental analysis of spot defects in SRAMs: realistic...
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ETS
2010
IEEE
153views Hardware» more  ETS 2010»
13 years 3 months ago
Analysis of resistive-bridging defects in SRAM core-cells: A comparative study from 90nm down to 40nm technology nodes
ÑIn this paper, we present a comparative study on the effects of resistive-bridging defects in the SRAM core-cells, considering different technology nodes. In particular, we analy...
Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio,...
ITC
1994
IEEE
111views Hardware» more  ITC 1994»
13 years 9 months ago
Simulation Results of an Efficient Defect-Analysis Procedure
For obtaining a zero defect level, a high fault coverage with respect to the stuck-at fault model is often not sufficient as there are many defects that show a more complex behavi...
Olaf Stern, Hans-Joachim Wunderlich
DAC
2000
ACM
13 years 9 months ago
Modeling and simulation of real defects using fuzzy logic
Real defects (e.g. stuck-at or bridging faults) in the VLSI circuits cause intermediate voltages and can not be modeled as ideal shorts. In this paper we first show that the trad...
Amir Attarha, Mehrdad Nourani, Caro Lucas
ASPDAC
2001
ACM
82views Hardware» more  ASPDAC 2001»
13 years 8 months ago
Towards the logic defect diagnosis for partial-scan designs
Loical defect diagnosis is a critical yet challenging process in VLSI manufacturing. It involves the identification of the defect spots in a logic IC that fails testing. In the la...
Shi-Yu Huang
ITC
2002
IEEE
112views Hardware» more  ITC 2002»
13 years 9 months ago
Multiplets, Models, and the Search for Meaning: Improving Per-Test Fault Diagnosis
The advantage to “one test at a time” fault diagnosis is its ability to implicate the components of complicated defect behaviors. The disadvantage is the large size and opacit...
David B. Lavo, Ismed Hartanto, Tracy Larrabee