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» An on Chip ADC Test Structure
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DATE
2000
IEEE
134views Hardware» more  DATE 2000»
13 years 9 months ago
An on Chip ADC Test Structure
In this paper, a new built-in self-test structure to test the static specifications of analog to digital converters (ADCs) is presented. A ramp signal generated by an integrator ...
Yun-Che Wen, Kuen-Jong Lee
ISCAS
2005
IEEE
153views Hardware» more  ISCAS 2005»
13 years 10 months ago
A two-step DDEM ADC for accurate and cost-effective DAC testing
— This paper presents a scheme for testing DACs’ static non-linearity errors by using a two-step flash ADC with deterministic dynamic element matching (DDEM). In this work, the...
Hanqing Xing, Degang Chen, Randall L. Geiger
DATE
2000
IEEE
110views Hardware» more  DATE 2000»
13 years 9 months ago
A BIST Scheme for On-Chip ADC and DAC Testing
In this paper, we present a BIST scheme for testing onchip AD and DA converters. We discuss on-chip generation of linear ramps as test stimuli, and propose techniques for measurin...
Jiun-Lang Huang, Chee-Kian Ong, Kwang-Ting Cheng
ITC
1993
IEEE
104views Hardware» more  ITC 1993»
13 years 8 months ago
A BIST Scheme for an SNR Test of a Sigma-Delta ADC
Built-In-Self-Test BIST for VLSI systems is desirable in order to reduce the cost per chip of production-time testing by the manufacturer. In addition, it can provide the means ...
M. F. Toner, Gordon W. Roberts
ADC
2007
Springer
125views Database» more  ADC 2007»
13 years 11 months ago
Building a Disordered Protein Database: A Case Study in Managing Biological Data
A huge diversity of biological databases is available via the Internet, but many of these databases have been developed in an ad hoc manner rather than in accordance with any data...
Arran D. Stewart, Xiuzhen Zhang