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HOTI
2005
IEEE
13 years 11 months ago
Design of Randomized Multichannel Packet Storage for High Performance Routers
High performance routers require substantial amounts of memory to store packets awaiting transmission, requiring the use of dedicated memory devices with the density and capacity ...
Sailesh Kumar, Patrick Crowley, Jonathan S. Turner
ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
14 years 2 months ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi
VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
14 years 5 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
ASPDAC
2005
ACM
122views Hardware» more  ASPDAC 2005»
13 years 7 months ago
A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lind...
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 2 months ago
Performance Efficiency of Context-Flow System-on-Chip Platform
Recent efforts in adapting computer networks into system-on-chip (SOC), or network-on-chip, present a setback to the traditional computer systems for the lack of effective program...
Rami Beidas, Jianwen Zhu