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» Challenges in Automatic Optimization of Arithmetic Circuits
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ISQED
2009
IEEE
112views Hardware» more  ISQED 2009»
14 years 25 days ago
Estimation and optimization of reliability of noisy digital circuits
— With continued scaling, reliability is emerging as a critical challenge for the designers of digital circuits. The challenge stems in part from the lack of computationally efï¬...
Satish Sivaswamy, Kia Bazargan, Marc D. Riedel
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
14 years 13 days ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
13 years 8 months ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy
AAAI
2008
13 years 8 months ago
Diagnosing Faults in Electrical Power Systems of Spacecraft and Aircraft
Electrical power systems play a critical role in spacecraft and aircraft, and they exhibit a rich variety of failure modes. This paper discusses electrical power system fault diag...
Ole J. Mengshoel, Adnan Darwiche, Keith Cascio, Ma...
ARVLSI
1995
IEEE
220views VLSI» more  ARVLSI 1995»
13 years 9 months ago
Optimization of combinational and sequential logic circuits for low power using precomputation
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...
José Monteiro, John Rinderknecht, Srinivas ...