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» DAPR: Design Automation for Partially Reconfigurable FPGAs
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ARCS
2006
Springer
13 years 8 months ago
Combitgen: A new approach for creating partial bitstreams in Virtex-II Pro
Today's FPGAs (Field Programmable Gate Arrays) are widely used, but not to their full potential. In Virtex series FPGAs from Xilinx a special feature, the dynamic and partial...
Christopher Claus, Florian Helmut Müller, Wal...
CODES
2009
IEEE
13 years 8 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
IPPS
2002
IEEE
13 years 9 months ago
JPG - A Partial Bitstream Generation Tool to Support Partial Reconfiguration in Virtex FPGAs
Reconfigurable computing based on partial reconfiguration of field programmable gate arrays (FPGAs) is yet to move to the mainstream of computing. Hardware devices that support su...
Anup Kumar Raghavan, Peter Sutton
DFT
2007
IEEE
152views VLSI» more  DFT 2007»
13 years 8 months ago
TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs
This paper presents the adoption of the Triple Modular Redundancy coupled with the Partial Dynamic Reconfiguration of Field Programmable Gate Arrays to mitigate the effects of Sof...
Cristiana Bolchini, Antonio Miele, Marco D. Santam...
FPL
2004
Springer
147views Hardware» more  FPL 2004»
13 years 10 months ago
Partial and Dynamically Reconfiguration of Xilinx Virtex-II FPGAs
Current trends show that partial and dynamic reconfiguration can be used in adaptive systems. These systems are able to adapt themselves to the demand of their environment during r...
Brandon Blodget, Christophe Bobda, Michael Hü...