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ICCAD
1997
IEEE
108views Hardware» more  ICCAD 1997»
13 years 9 months ago
Fault simulation of interconnect opens in digital CMOS circuits
We describe a highly accurate but e cient fault simulator for interconnect opens, based on characterizing the standard cell library with SPICE; using transistor charge equations f...
Haluk Konuk
ITC
1996
IEEE
107views Hardware» more  ITC 1996»
13 years 9 months ago
Digital Integrated Circuit Testing using Transient Signal Analysis
A novel approach to testing CMOS digital circuits is presented that is based on an analysis of IDD switching transients on the supply rails and voltage transients at selected test...
James F. Plusquellic, Donald M. Chiarulli, Steven ...
VTS
1996
IEEE
74views Hardware» more  VTS 1996»
13 years 9 months ago
An unexpected factor in testing for CMOS opens: the die surface
In this paper, we for the rst time present experimental evidence that the die surface can act as an RC interconnect, becoming an important factor in determining the voltage of a o...
Haluk Konuk, F. Joel Ferguson
ITC
2002
IEEE
86views Hardware» more  ITC 2002»
13 years 10 months ago
Incremental Diagnosis of Multiple Open-Interconnects
With increasing chip interconnect distances, openinterconnect is becoming an important defect. The main challenge with open-interconnects stems from its non-deterministic real-lif...
Jiang Brandon Liu, Andreas G. Veneris, Hiroshi Tak...
DFT
2007
IEEE
109views VLSI» more  DFT 2007»
13 years 11 months ago
Safety Evaluation of NanoFabrics
Chemically Assembled Electronic Nanotechnology is a promising alternative to CMOS fabrication. In particular, the nanoFabric has proven to be a viable solution for implementing di...
Michelangelo Grosso, Maurizio Rebaudengo, Matteo S...