192 search results - page 1 / 39 » Functional Scan Chain Testing |
DATE
1998
IEEE
13 years 9 months ago
1998
IEEE
Functional scan chains are scan chains that have scan paths through a circuit's functional logic and flip-flops. Establishing functional scan paths by test point insertion (T...
ISQED
2006
IEEE
13 years 10 months ago
2006
IEEE
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
ICCD
2004
IEEE
14 years 1 months ago
2004
IEEE
This paper shows that by creating functional scan chains at the register-transfer level (RTL), not only the timing of the circuit can be improved, but also the test data compressi...
VTS
2002
IEEE
13 years 9 months ago
2002
IEEE
Parallel test application helps reduce the otherwise considerable test times in SOCs; yet its applicability is limited by average and peak power considerations. The typical test v...
VTS
1996
IEEE
13 years 9 months ago
1996
IEEE
Designing a testable circuit is often a two step process. First, the circuit is designed to conform to the functional specifications. Then, the testability aspects are added. By t...