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» Hardware synthesis from protocol specifications in LOTOS
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CODES
2004
IEEE
13 years 8 months ago
Hardware synthesis from coarse-grained dataflow specification for fast HW/SW cosynthesis
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
Hyunuk Jung, Soonhoi Ha
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 1 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
Daniel L. Rosenband
RSP
1999
IEEE
160views Control Systems» more  RSP 1999»
13 years 9 months ago
Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping
SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The ...
Oliver Bringmann, Wolfgang Rosenstiel, Annette Mut...
ISSS
1996
IEEE
94views Hardware» more  ISSS 1996»
13 years 9 months ago
Synthesis of Low-Power Selectively-Clocked Systems from High-Level Specification
Luca Benini, Patrick Vuillod, Claudionor Jos&eacut...