17 search results - page 1 / 4 » Modeling and Evaluation of Substrate Noise Induced by Interc... |
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Interconnects have deserved attention as a source of crosstalk to other interconnects, but have been ignored as a source of substrate noise. In this paper, we evaluate the importa...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery s...
DAC
1996
ACM
13 years 9 months ago
1996
ACM
A novel methodology for circuit design and automatic layout generation is proposed for a class of mixed-signal circuits in presence of layout parasitics and substrate induced nois...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
— In this paper, we introduce a novel substrate noise estimation technique during early floorplanning, based on the concept of Block Preference Directed Graph (BPDG) and the cla...
ISQED
2003
IEEE
13 years 10 months ago
2003
IEEE
The internal-switching induced simultaneous switching noise (SSN) is studied in the paper. Unlike ground bounce caused by driving off-chip loading, both power-rail and ground-rail...