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ATS
2005
IEEE
144views Hardware» more  ATS 2005»
13 years 10 months ago
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing
—Test application at reduced power supply voltage (low-voltage testing) or reduced temperature (low-temperature testing) can improve the defect coverage of a test set, particular...
Sandip Kundu, Piet Engelke, Ilia Polian, Bernd Bec...
ICCD
1999
IEEE
112views Hardware» more  ICCD 1999»
13 years 9 months ago
On Detecting Bridges Causing Timing Failures
High resistance bridges (resistive bridges) are becoming more common. Such bridges cause speed failures. Published experimental results show that current tests are not good at det...
Sreenivas Mandava, Sreejit Chakravarty, Sandip Kun...
VTS
2000
IEEE
108views Hardware» more  VTS 2000»
13 years 9 months ago
Cold Delay Defect Screening
Delay defects can escape detection during the normal production test flow, particularly if they do not affect any of the long paths included in the test flow. Some defect types ca...
Chao-Wen Tseng, Edward J. McCluskey, Xiaoping Shao...
ITC
1998
IEEE
89views Hardware» more  ITC 1998»
13 years 9 months ago
Detecting resistive shorts for CMOS domino circuits
We investigate defects in CMOS domino gates and derive the test conditions for them. Very-Low-Voltage Testing can improve the defect coverage, which we define as the maximum detec...
Jonathan T.-Y. Chang, Edward J. McCluskey
ITC
2003
IEEE
162views Hardware» more  ITC 2003»
13 years 10 months ago
FPGA Interconnect Delay Fault Testing
The interconnection network consumes the majority of die area in an FPGA. Presented is a scalable manufacturing test method for all SRAM-based FPGAs, able to detect multiple inter...
Erik Chmelar