6 search results - page 1 / 2 » On the Effect of Stuck-at Faults on Delay-insensitive Nanosc... |
DAC
2005
ACM
13 years 7 months ago
2005
ACM
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
DFT
2005
IEEE
13 years 11 months ago
2005
IEEE
DSD
2007
IEEE
13 years 9 months ago
2007
IEEE
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
—Two probabilistic-based models, namely the Ensemble-Dependent Matrix model [1][3] and the Markov Random Field model [2], have been proposed to deal with faults in nanoscale syst...
DFT
2006
IEEE
13 years 7 months ago
2006
IEEE
As the technology enters the nano dimension, the inherent unreliability of nanoelectronics is making fault-tolerant architectures increasingly necessary in building nano systems. ...