12 search results - page 1 / 3 » On-chip power network optimization with decoupling capacitor... |
ASPDAC
2010
ACM
13 years 2 months ago
2010
ACM
TVLSI
2008
13 years 4 months ago
2008
Abstract--A distributed on-chip decoupling capacitor network is proposed in this paper. A system of distributed on-chip decoupling capacitors is shown to provide an efficient solut...
ISQED
2005
IEEE
13 years 10 months ago
2005
IEEE
Adding on-chip decoupling capacitors (decaps) is an effective way to reduce voltage noise in power/ground networks and ensure robust power delivery. In this paper, we present a fa...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
- This paper proposes a fast and practical decoupling capacitor (decap) budgeting algorithm to optimize the power ground (P/G) network design. The new method adopts a modified rand...
ASPDAC
2009
ACM
13 years 9 months ago
2009
ACM
— In three-dimensional (3D) chips, the amount of supply current per package pin is significantly more than in two-dimensional (2D) designs. Therefore, the power supply noise pro...