446 search results - page 3 / 90 » Power Efficient Mediaprocessors: Design Space Exploration |
ASPLOS
2006
ACM
13 years 9 months ago
2006
ACM
We propose regression modeling as an efficient approach for accurately predicting performance and power for various applications executing on any microprocessor configuration in a...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
— With power a major limiting factor in the design of scalable interconnected systems, power-aware networks will become inherent components of single-chip and multi-chip systems....
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
Multi-million gate System-on-Chip (SoC) designs increasingly rely on Intellectual Property (IP) blocks. However, due to technology scaling the leakage power consumption of the IP ...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
DATE
2009
IEEE
14 years 3 days ago
2009
IEEE
As industry moves towards many-core chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constr...