20 search results - page 4 / 4 » Pseudo-Random Pattern Testing of Bridging Faults |
ASPDAC
2005
ACM
13 years 7 months ago
2005
ACM
Abstract— In this paper we study the testability of circuits derived from Binary Decision Diagrams (BDDs) under the bridging fault model. It is shown that testability can be form...
DAC
2000
ACM
13 years 10 months ago
2000
ACM
Real defects (e.g. stuck-at or bridging faults) in the VLSI circuits cause intermediate voltages and can not be modeled as ideal shorts. In this paper we first show that the trad...
ET
2006
13 years 5 months ago
2006
We present an efficient built-in self-test (BIST) architecture for testing and diagnosing stuck-at faults, delay faults, and bridging faults in FPGA interconnect resources. The BIS...
ATS
2009
IEEE
14 years 12 days ago
2009
IEEE
Diagnostic ATPG has traditionally been used to generate test patterns that distinguish pairs of modeled faults. In this work, we investigate the use of n-distinguishing test sets,...
ICCAD
1999
IEEE
13 years 10 months ago
1999
IEEE
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...