25 search results - page 5 / 5 » Rectilinear Steiner Trees with Minimum Elmore Delay |
GLVLSI
1996
IEEE
13 years 9 months ago
1996
IEEE
In this paper, we propose a global routing algorithm for multi-layer building-block layouts. The algorithm is based on successive ripup and rerouting while satisfying edge capacit...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Clock-tuning has been classified as important but tough tasks due to the non-convex nature caused by the skew requirements. As a result, all existing mathematical programming appr...
CIC
2004
13 years 6 months ago
2004
As a key issue in multicast routing with quality of service (QoS) support, constrained minimum Steiner tree (CMST) problem has been a research focus for more than a decade, and ten...
CORR
2010
Springer
13 years 4 months ago
2010
Springer
We introduce a problem that is a common generalization of the uncapacitated facility location (UFL) and minimum latency (ML) problems, where facilities not only need to be opened ...
ISVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
The “chicken-egg” dilemma between VLSI interconnect timing optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as...