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» Technology-Dependent Transformations for Low-Power Synthesis
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DAC
1997
ACM
13 years 9 months ago
Technology-Dependent Transformations for Low-Power Synthesis
We propose a methodology for applying gate-level logic transformations to optimize power in digital circuits. Statistically simulated[14] switching information, gate delays, signa...
Rajendran Panda, Farid N. Najm
GLVLSI
1998
IEEE
101views VLSI» more  GLVLSI 1998»
13 years 9 months ago
How to Transform an Architectural Synthesis Tool for Low Power VLSI Designs
S. Gailhard, Nathalie Julien, Jean-Philippe Diguet...
VLSID
2002
IEEE
135views VLSI» more  VLSID 2002»
14 years 5 months ago
An Efficient Algorithm for Low Power Pass Transistor Logic Synthesis
In this paper, we address the problem of power dissipation minimization in combinational circuits implemented using pass transistor logic (PTL). We transform the problem of power ...
Rupesh S. Shelar, Sachin S. Sapatnekar
ICCAD
1997
IEEE
97views Hardware» more  ICCAD 1997»
13 years 9 months ago
Low power logic synthesis for XOR based circuits
An abundance of research e orts in low power logic synthesis have so far been focused on and or or nand nor based logic. A typical approach is to rst generate an initial multi-lev...
Unni Narayanan, C. L. Liu
ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
13 years 9 months ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha