48 search results - page 1 / 10 » The Validity of Retiming Sequential Circuits |
DAC
1995
ACM
13 years 8 months ago
1995
ACM
Retiming has been proposed as an optimizationstep forsequential circuits represented at the net-list level. Retiming moves the latches across the logic gates and in doing so chang...
VLSID
1999
IEEE
13 years 9 months ago
1999
IEEE
Retiming is a transformation that optimizes a sequential circuit by relocating the registers. When the circuit has an initial state, one must compute an equivalent initial state f...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
— Process variations in digital circuits make sequential circuit timing validation an extremely challenging task. In this paper, a Statistical Bellman-Ford (SBF) algorithm is pro...
ICCAD
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract— Retiming, c-slow retiming and recycling are different transformations for the performance optimization of sequential circuits. For retiming and c-slow retiming, differe...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
In this paper we present a new efficient algorithm for retiming sequential circuits with edge-triggered registers under both setup and hold constraints. Compared with the previous...