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VLSID
2005
IEEE
139views VLSI» more  VLSID 2005»
14 years 5 months ago
Variable Input Delay CMOS Logic for Low Power Design
Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
FCCM
2005
IEEE
132views VLSI» more  FCCM 2005»
13 years 10 months ago
Hardware Factorization Based on Elliptic Curve Method
The security of the most popular asymmetric cryptographic scheme RSA depends on the hardness of factoring large numbers. The best known method for factorization large integers is ...
Martin Simka, Jan Pelzl, Thorsten Kleinjung, Jens ...
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
13 years 10 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
ISPD
2005
ACM
151views Hardware» more  ISPD 2005»
13 years 10 months ago
Thermal via placement in 3D ICs
As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promi...
Brent Goplen, Sachin S. Sapatnekar
DAC
2005
ACM
13 years 6 months ago
Partitioning-based approach to fast on-chip decap budgeting and minimization
This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, ...