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    ASPDAC
    2009
    ACM
    130views Hardware» more  ASPDAC 2009»
    Analog placement with common centroid and 1-D symmetry constraints
    13 years 11 months ago
    Analog placement with common centroid and 1-D symmetry constraints
    Download  www.cse.cuhk.edu.hk
    — 1In this paper, we will present a placement method for analog circuits. We consider both common centroid and 1-D symmetry constraints, which are the two most common types of pl...
    Linfu Xiao, Evangeline F. Y. Young
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    ASPDAC
    2009
    ACM
    125views Hardware» more  ASPDAC 2009»
    A dynamic quality-scalable H.264 video encoder chip
    13 years 11 months ago
    A dynamic quality-scalable H.264 video encoder chip
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    Hsiu-Cheng Chang, Yao-Chang Yang, Jia-Wei Chen, Ch...
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    ASPDAC
    2009
    ACM
    132views Hardware» more  ASPDAC 2009»
    A cycle-based synthesis algorithm for reversible logic
    13 years 11 months ago
    A cycle-based synthesis algorithm for reversible logic
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    Zahra Sasanian, Mehdi Saeedi, Mehdi Sedighi, Morte...
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    ASPDAC
    2009
    ACM
    143views Hardware» more  ASPDAC 2009»
    Statistical modeling and analysis of chip-level leakage power by spectral stochastic method
    13 years 11 months ago
    Statistical modeling and analysis of chip-level leakage power by spectral stochastic method
    Download  www.ee.ucr.edu
    In this paper, we present a novel statistical full-chip leakage power analysis method. The new method can provide a general framework to derive the full-chip leakage current or po...
    Ruijing Shen, Ning Mi, Sheldon X.-D. Tan, Yici Cai...
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    ASPDAC
    2009
    ACM
    137views Hardware» more  ASPDAC 2009»
    Ultra low-power ANSI S1.11 filter bank for digital hearing aids
    13 years 11 months ago
    Ultra low-power ANSI S1.11 filter bank for digital hearing aids
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    Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li, Chou-Kun Li...
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    ASPDAC
    2009
    ACM
    115views Hardware» more  ASPDAC 2009»
    Automatic formal verification of clock domain crossing signals
    13 years 11 months ago
    Automatic formal verification of clock domain crossing signals
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    Bing Li, Chris Ka-Kei Kwok
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    ASPDAC
    2009
    ACM
    100views Hardware» more  ASPDAC 2009»
    Noise minimization during power-up stage for a multi-domain power network
    13 years 11 months ago
    Noise minimization during power-up stage for a multi-domain power network
    Download  learn.tsinghua.edu.cn
    – With the popularity of Multiple Power Domain (MPD) design, the multi-domain power network noise analysis and minimization is becoming important. This paper describes an efficie...
    Wanping Zhang, Yi Zhu, Wenjian Yu, Amirali Shayan ...
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    ASPDAC
    2009
    ACM
    131views Hardware» more  ASPDAC 2009»
    A 1 GHz CMOS comparator with dynamic offset control technique
    13 years 11 months ago
    A 1 GHz CMOS comparator with dynamic offset control technique
    Download  www.kuroda.elec.keio.ac.jp
    − A dynamic offset control technique that employs charge compensation by timing control is proposed for comparator design in scaled CMOS technology. The analysis has
    Xiaolei Zhu, Sanroku Tsukamoto, Tadahiro Kuroda
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    ASPDAC
    2009
    ACM
    100views Hardware» more  ASPDAC 2009»
    A wireless real-time on-chip bus trace system
    13 years 11 months ago
    A wireless real-time on-chip bus trace system
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    Shusuke Kawai, Takayuki Ikari, Yutaka Takikawa, Hi...
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