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ASPDAC
2008
ACM
119views Hardware» more  ASPDAC 2008»
13 years 6 months ago
A stochastic local hot spot alerting technique
- With the increasing levels of variability in the behavior of manufactured nano-scale devices and dramatic changes in the power density on a chip, timely identification of hot spo...
Hwisung Jung, Massoud Pedram
ASYNC
1999
IEEE
136views Hardware» more  ASYNC 1999»
13 years 9 months ago
A Counterflow Pipeline Experiment
The counterflow pipeline architecture [12] consists of two interacting pipelines in which data items flow in opposite directions. Interactions occur between two items when they me...
Bill Coates, Jo C. Ebergen, Jon K. Lexau, Scott Fa...
ICES
2001
Springer
136views Hardware» more  ICES 2001»
13 years 9 months ago
Initial Studies of a New VLSI Field Programmable Transistor Array
A system for intrinsic hardware evolution of analog electronic circuits is presented. It consists of a VLSI chip featuring 16 × 16 programmable transistor cells, an FPGA based PCI...
Jörg Langeheine, Joachim Becker, Simon Fö...
VTS
2005
IEEE
145views Hardware» more  VTS 2005»
13 years 10 months ago
Hardware Results Demonstrating Defect Detection Using Power Supply Signal Measurements
The power supply transient signal (IDDT) method that we propose for defect detection analyze regional signal variations introduced by defects at a set of power supply pads on the ...
Dhruva Acharyya, Jim Plusquellic
IWSOC
2005
IEEE
133views Hardware» more  IWSOC 2005»
13 years 10 months ago
Design Mapping, and Simulations of a 3G WCDMA/FDD Basestation Using Network on Chip
This paper presents a case study of a single-chip 3G WCDMA/FDD basestation implementation based on a circuit-switched network on chip. As the amount of transistors on a chip conti...
Daniel Wiklund, Dake Liu
ISCAS
2006
IEEE
135views Hardware» more  ISCAS 2006»
13 years 10 months ago
A sensor system on chip for wireless microsystems
Recent years have seen the rapid development of microsensor technology, system on chip design, wireless technology and ubiquitous computing. When assembled into a complex microsys...
L. Wang, Nizamettin Aydin, A. Astaras, M. Ahmadian...
CCECE
2006
IEEE
13 years 10 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya
ISCA
2007
IEEE
106views Hardware» more  ISCA 2007»
13 years 11 months ago
Architectural implications of brick and mortar silicon manufacturing
We introduce a novel chip fabrication technique called “brick and mortar”, in which chips are made from small, pre-fabricated ASIC bricks and bonded in a designer-specified a...
Martha Mercaldi Kim, Mojtaba Mehrara, Mark Oskin, ...
ICPP
2008
IEEE
13 years 11 months ago
Thermal Management for 3D Processors via Task Scheduling
A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, high-speed interface to increase the device density and ...
Xiuyi Zhou, Yi Xu, Yu Du, Youtao Zhang, Jun Yang 0...
FDTC
2009
Springer
100views Cryptology» more  FDTC 2009»
13 years 11 months ago
Using Optical Emission Analysis for Estimating Contribution to Power Analysis
—This paper shows that optical emissions from an operating chip have a good correlation with power traces and can therefore be used to estimate the contribution of different area...
Sergei P. Skorobogatov