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DAC
1997
ACM
13 years 9 months ago
Equivalence Checking Using Cuts and Heaps
This paper presents a verification technique which is specifically targeted to formally comparing large combinational circuits with some structural similarities. The approach co...
Andreas Kuehlmann, Florian Krohm
DAC
1997
ACM
13 years 9 months ago
An Integrated Design Environment for Performance and Dependability Analysis
Robert H. Klenke, Moshe Meyassed, James H. Aylor, ...
DAC
1997
ACM
13 years 9 months ago
System-Level Synthesis of Low-Power Hard Real-Time Systems
We present a system-level approach for power optimization under a set of user specified costs and timing constraints of hard real-time designs. The approach optimizes all three d...
Darko Kirovski, Miodrag Potkonjak
DAC
1997
ACM
13 years 9 months ago
Synthesis of Application Specific Programmable Processors
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak
DAC
1997
ACM
13 years 9 months ago
Multilevel Hypergraph Partitioning: Application in VLSI Domain
In this paper, we present a new hypergraph partitioning algorithm that is based on the multilevel paradigm. In the multilevel paradigm, a sequence of successively coarser hypergra...
George Karypis, Rajat Aggarwal, Vipin Kumar, Shash...
DAC
1997
ACM
13 years 9 months ago
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology
Multi-threshold CMOS is an increasingly popular circuit approach that enables high performance and low power operation. However, no methodologies have been developed to size the h...
James Kao, Anantha Chandrakasan, Dimitri Antoniadi...
DAC
1997
ACM
13 years 9 months ago
More Practical Bounded-Skew Clock Routing
: Academic clock routing research results has often had limited impact on industry practice, since such practical considerations as hierarchical buffering, rise-time and overshoot ...
Andrew B. Kahng, Chung-Wen Albert Tsao
DAC
1997
ACM
13 years 9 months ago
Post-Layout Logic Restructuring for Performance Optimization
Yi-Min Jiang, Angela Krstic, Kwang-Ting Cheng, Mal...