PATMOS
2010
Springer
13 years 2 months ago
2010
Springer
In most modern processor designs the L1 data cache has become a major consumer of power due to its increasing size and high frequency access rate. In order to reduce this power con...
TVLSI
2008
13 years 3 months ago
2008
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance o...
ISCAPDCS
2004
13 years 5 months ago
2004
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
DSD
2008
IEEE
13 years 6 months ago
2008
IEEE
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay techniques. We discovered that a filter cache, traditionally used for reducing...
CF
2005
ACM
13 years 6 months ago
2005
ACM
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
ICS
1995
Tsinghua U.
13 years 7 months ago
1995
Tsinghua U.
Current data cache organizations fail to deliver high performance in scalar processors for many vector applications. There are two main reasons for this loss of performance: the u...
ENC
2004
IEEE
13 years 8 months ago
2004
IEEE
This article deals with the problem of data cache for dynamic web servers. A set of requests (which number could be large) is submitted to a server for computing. Every request is...
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper presents a new and simple prefetching mechanism to improve the memory performance of multimedia applications. This method adapts the memory access mechanism to the acce...
CASES
2007
ACM
13 years 8 months ago
2007
ACM
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...
ISSS
1996
IEEE
13 years 8 months ago
1996
IEEE
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...